Analogist company,Ltd.

[Japanese]

IC Layout LVS/DRC Verification tool(Raikiri)

Raikiri is a mask layout verification tool of LVS/DRC for IC/LSI.
It can be read majority of foundry supplied PDK rule file directly without script translation.
Raikiri takes fullset LVS procedure without abbreviation. We offer high-speed and full function LVS/DRC in low price.
It contribute to save IC development cost and relax investiment risk. Keep high compatibility and easy to use.
[LVS]
Majority of foundry prepared LVS rule file can be handled.
To ease in finding LVS un-matched components and nets, raikiri copies matched schametic net/element information to Layout extracted net.
[DRC]
Full DRC can be attained in high-speed. Easy to use and keep good compatibility.

[Summary]

Raikiri Introduction data(PDF)

Analog IP Products

Sorry. We are stopping IP design service temporary because of EDA equipment problem.

Achieved Processes

0.6μm, 0.35μm, 0.25μm, 0.18μm, 0.13μm, 90nm, 40nm, 28nm

A/D converters

Pipeline: By using original architecture, both low-power and high-speed technology can be attained.
Flash: Possess single step very high-speed flash, and multi-step flash technology.
SAR: Boot by single shot trigger and return to stand-by mode. Low-power.

10bit A/D Converter

Model number: AGAD11
Method: Pipeline
Process: 0.35μm
Resolution: 10bit
Conversion rate: 100MSPS
Supply voltage: 3.3V single
Remarks: Silicon proven. Attained low-power by original architecture.

10bit A/D Converter

Model number: AGAD12
Method: Pipeline
Process: 0.18μm
Resolution: 10bit
Conversion rate: 167MSPS
Supply voltage: 1.8V single
Remarks: Silicon proven. Attained low-power by original architecture.

14bit A/D Converter

Model number: AGAD13
Method: Pipeline
Process: 0.18μm
Resolution: 14bit
Conversion rate: 50MSPS
Supply voltage: 1.8V single
Remarks: Silicon proven. Attained low-power by original architecture.

8bit A/D Converter

Model number: AGAD41
Method: 2 step flash
Process: 0.13μm
Resolution: 8bit
Conversion rate: 100MSPS
Supply voltage: 1.2V single
Remarks: High-speed, small-area, low-power attained.

12bit A/D Converter

Model number: AGAD52
Method: Multi step flash
Process: 0.13μm
Resolution: 12bit
Conversion rate: 10MSPS
Supply voltage: 5V single
Remarks: Attained good power efficiency(35mW at 10MSPS) by original architecture.
Easy to design lower supply voltage version.

16bit A/D Converter

Model number: AGAD61
Method: SAR(Successive Approximation Register)
Process: 0.13μm
Resolution: 16bit
Conversion rate: 500kSPS
Supply voltage: 5V single
Remarks: Low-power(6nJ/conversion, 15mW at 500kSPS). Trimming required.

12-18bit A/D Converter

Model number: Not assigned.
Method: SAR
Process: TBD.
Resolution: 12-18bit
Conversion rate:about 100kSPS
Supply voltage: TBL.
Remarks: Archtecture design already prepared. Neither trimming nor calibration required.

16bit High speed A/D Converter

Model number: Not assigned.
Method: Pipeline
Process: TBD.
Resolution: 16bit
Conversion rate:100M-200MSPS
Supply voltage: TBD.
Remarks: Archtecture design already prepared. Use trimming or calibration. Good stability can be expected.

[Delta-Sigma A/D converter]

 Delta-Sigma A/D converter(ADC) have low noise characteristic and used widely for audio, sensor, etc.
But, Now I want to put question, "Is delta-sigma only best method for Audio frequency A/D conversion?".
 Low-Noise in delta-sigma ADC is brought by oversampling that can be achieved by oversampled pipeline ADC also.
Problem in delta-sigma ADC cannot define exact timings between analog input signal and digital output. Furthermore, group delay characteristic is not flat.
For these points, pipeline may superior to acquire exact AF wave shape.
I hope you re-consider use pipeline ADC for High-quality Audio, and sonar radar system.
 Analogist have conception high bit and wide dymamic range pipelined ADC.

D/A Converter

Current steering and Resistor string types are available.
Current steering: High-speed, low-noise(glitch), low-power, high-precision attained.
Low-AC distortion type available.
Resistor string: Normal type, and original differential output type available.

10bit D/A Converter

Model number: AGDA11
Method: Current steering
Process: 0.35μm
Resolution: 10bit
Conversion rate:150MSPS
Supply voltage: 3.3V single
Remarks: Silicon proven. Low-noise, low-glitch, good-linearity attained.

14bit D/A Converter

Model number: AGDA13
Method: Current steering
Process: 90nm
Resolution: 14bit
Conversion rate: 150MSPS
Supply voltage: 1.2V(Digital)/3.3V(Analog)
Remarks: Silicon proven. 14bit resolution attained without calibration and triming.

10bit D/A Converter

Model number: AGDA21
Method: Current steering
Process: 0.13μm
Resolution: 10bit
Conversion rate: 150MSPS
Supply voltage: 1.2V single
Remarks: Silicon proven. Low-noise, low-glitch, good-linearity attained.

12bit low-distortion D/A Converter

Model number: AGDA22
Method: Current steering
Process: 0.35μm
Resolution: 12bit
Convertion rate: 200MSPS
Supply voltage: 3.3V single
Remarks: Low-noise, low-glitch, low-distortion until nyquist can be attained by original architecture.

PLL, DLL, CDR

Analog and digital type PLL/CDR are available.
Original charge-pump outputs close to ideal rectangular current that contribute to low jitter.
VCO is differential type, that good PSRR and noise durability.
Use anti-mullock circuit in DLL for safety.

200MHz-PLL

Model number: AGPL11
Process: 0.35μm
Output frequency: 10MHz - 200MHz
Supply voltage: 3.3V single
Remarks: General purpose analog PLL

210MHz-PLL

Model number: AGPL12
Process: 0.18μm
Output frequency: 10MHz - 210MHz
Supply voltage: 1.8V single
Remarks: General purpose analog PLL

1.25GMHz-PLL

Model number: AGPL23
Process: 0.13μm
Output frequency: 125MHz~1.25GHz
Supply voltage: 1.2V single
Remarks: HDMI-1.3a adopted.

100MHz-DLL

Model number: AGDL11
Process: 0.35μm
Output frequency: 10MHz~100MHz
Supply voltage: 3.3V single
Remarks: Anti mullock circuit used. low-jitter

180MHz-DLL

Model number: AGDL12
Process: 0.18μm
Output frequency: 10MHz~180MHz
Supply voltage: 1.8V single
Remarks: Anti mullock circuit used. low-jitter. Clock duty correction circuit available.

Single wire I/F technique

Achivement in colaboration with Kyushu Institute of Technology. Attained high-speed(500kbps), and high reliability. Japan, U.S., and EU patent granted.

  • Can be communicate in single wire. If use impedance controlled line, power and signal multiplex transmission available.
  • High-speed, high-reliability
  • Easy to design interface
  • Low-power, small-area
  • Bi-directional communication, digi-chain, and branch network available
Assumption application
  • Inside car, airplane network
  • Sensor network
  • Robotics network
  • Digital Audio transmission network
Related this technology, Almost CMOS conpatible impedance matched long wire communication technology available.

Opamp offset correction technique

Opamp offset calibration circuit available.
Low supply voltage drift, low temparature drift, and high carlibration stability.
Calibration time is less than 100us, calibration interval not specified. Around 0.1mV offset can be attained.

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